1. Field of the Invention
This invention relates to a light emitting device which can be integrated in a semiconductor integrated circuit, a semiconductor integrated circuit which can be readily subjected to a functional test, failure analysis, debugging or the like, and an apparatus for testing such a semiconductor integrated circuit.
2. Description of the Prior Art
When a semiconductor integrated circuit (hereinafter, referred to as "chip") is subjected to a functional test, test patterns and test results are input or output through a limited number of input buffers and output buffers which are disposed in the periphery of the chip. The number of these input buffers and output buffers (hereinafter, referred to as "pads") is restricted by the area of the chip.
In recent microprocessors or the like, the unit of process has increased to 32 bits or 64 bits, and thus the number of test patterns, and internal signal lines in the chip which need to be monitored have increased in number. Furthermore, as the degree of integration has increased, the internal structure of the chip has also become more complicated, and the types of signal lines which need to be monitored have also risen in number. It is difficult to bring these signals out to the pads as they are, due to the number of lines and the limitations of circuits which can be used for circuit testing.
In order to reduce the number of pads which are used for testing, the scan path method is proposed in which signals that are processed in parallel inside the chip are converted to a string of serial signals using shift registers, and then delivered outside the chip or vice versa. In other proposed methods, the signal lines within the chip which are monitored by the output pads are restricted, and when it is necessary to check signal lines other than these, the signal lines are touched directly with a probe or measured with an electron beam tester.
However, signal measurement by touching signal lines directly with a probe cannot be performed accurately in the most recent chips, wherein the wiring width has been refined to about 1 .mu.m, because it is not easy to establish a good electrical contact between the wiring and the probe. Furthermore, it is difficult to perform measurement with good repeatability and without breaking the wiring. There are techniques for accumulated formation of large electrodes on fine wirings with FIB (Focused Ion Beam) apparatus etc., but these techniques are not suited for monitoring a large number of signals due to factors such as the formation time.
Further, as regards an electron beam tester, since measurement is performed by sampling signals with an electronic beam pulse in the direction of the time axis, a repeating test pattern is required, therefore measurement accuracy decreases with the increase of the size of a test pattern. For this reason, in the measurement of chips having a large logical depth, it is not possible to use a sufficiently large test pattern, and thus there is a limit to the kinds of functional tests which can be performed. Skill and substantially great amount of adjusting time are required to obtain a stable output waveform. Furthermore, an electron beam tester leads to high measurement costs, because it is expensive and has a vacuum system which is troublesome to maintain.